Cypress Semiconductor /psoc63 /SCB0 /I2C_CFG

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Interpret as I2C_CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SDA_IN_FILT_TRIM 0 (SDA_IN_FILT_SEL)SDA_IN_FILT_SEL 0SCL_IN_FILT_TRIM 0 (SCL_IN_FILT_SEL)SCL_IN_FILT_SEL 0SDA_OUT_FILT0_TRIM 0SDA_OUT_FILT1_TRIM 0SDA_OUT_FILT2_TRIM 0SDA_OUT_FILT_SEL

Description

I2C configuration

Fields

SDA_IN_FILT_TRIM

Trim settings for the 50ns glitch filter on the SDA input. Default setting meets the I2C glitch rejections specs. Programmability available if required

SDA_IN_FILT_SEL

Enable for 50ns glitch filter on SDA input ‘0’: 0 ns. '1: 50 ns (filter enabled).

SCL_IN_FILT_TRIM

Trim settings for the 50ns glitch filter on the SDA input. Default setting meets the I2C glitch rejections specs. Programmability available if required

SCL_IN_FILT_SEL

Enable for 50ns glitch filter on SCL input ‘0’: 0 ns. '1: 50 ns (filter enabled).

SDA_OUT_FILT0_TRIM

Trim settings for the 50ns delay filter on SDA output used to gurantee tHD_DAT I2C parameter. Default setting meets the I2C spec. Programmability available if required

SDA_OUT_FILT1_TRIM

Trim settings for the 50ns delay filter on SDA output used to gurantee tHD_DAT I2C parameter. Default setting meets the I2C spec. Programmability available if required

SDA_OUT_FILT2_TRIM

Trim settings for the 50ns delay filter on SDA output used to gurantee tHD_DAT I2C parameter. Default setting meets the I2C spec. Programmability available if required

SDA_OUT_FILT_SEL

Selection of cumulative filter delay on SDA output to meet tHD_DAT parameter ‘0’: 0 ns. ‘1’: 50 ns (filter 0 enabled). ‘2’: 100 ns (filters 0 and 1 enabled). ‘3’: 150 ns (filters 0, 1 and 2 enabled).

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